Tapis

Carian terbaru saya
Tapis melalui:
Bajet
hingga
hingga
hingga
Jenis
Kemahiran
Bahasa
    Status Pekerjaan
    3,114 opencl fpga tugasan ditemui, harga dalam USD
    Xilinx FPGA Expert 4 hari left
    DISAHKAN

    Xilinx SOC expert is required for a line of projects focusing on AI as a service, where we will build a SOC based server accessible from the cloud. The ideal candidate needs to be experienced with VIVADO, VITIS, HLS, and OpenCL. The ideal candidate must be an AXI4 expert and has real life experience with HLS, we will not teach anybody what's HLS and how he is supposed to use it, so please onl...

    $562 (Avg Bid)
    $562 Avg Bida
    4 bida
    Trophy icon JavaScript gpu secp256k1 17 hari left

    I need a script that when given a starting point on the curve can add point 1 to it check if the x value of the result is within range, if so send it to the main window along with the offset count from the starting point. This should run multi-thread using the GPU with OpenCL, OpenCL, WebGl or WebCl assuming each thread is using a different starting point Use ofany of these libraries will be acce...

    $75 (Avg Bid)
    Dijamin
    $75
    3 penyertaan
    Xilinx FPGA coding 2 hari left
    DISAHKAN

    Xilinx SOC expert is required for a line of projects focusing on AI as a service, where we will build a SOC based server accessible from the cloud. The ideal candidate needs to be experienced with VIVADO, VITIS, HLS, and OpenCL. The ideal candidate must be an AXI4 expert and has real life experience with HLS, we will not teach anybody what's HLS and how he is supposed to use it, so please onl...

    $644 (Avg Bid)
    $644 Avg Bida
    8 bida

    Skillset Requirements : - Work with Hardware and Design Engineer to define the Board Design Architecture, system requirements, component selections and implementation. - Accountable for developing FPGA designs, board bringup, retrospective, continuous improvements and documentation at system level. - Work on RTL coding using Verilog, performing simulations using ModelSim or QuestaSim, proficient i...

    $592 (Avg Bid)
    $592 Avg Bida
    3 bida

    Hi Xhulio K., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I need a program written in OpenCL that will be invoked via Java. It will be doing SHA-256 Proof of work. I will pass the function a String and how many leading 0s are needed. The result returned from the function is the nonce for x leading zeroes. This must be done as efficiently as...

    $250 (Avg Bid)
    $250 Avg Bida
    1 bida

    Hi Krishna G., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I need a program written in OpenCL that will be invoked via Java. It will be doing SHA-256 Proof of work. I will pass the function a String and how many leading 0s are needed. The result returned from the function is the nonce for x leading zeroes. This must be done as efficiently a...

    $250 (Avg Bid)
    $250 Avg Bida
    1 bida

    Practical FPGA Design and Interfacing Structure of exam: Programming using Quartus Prime Software : Quartus Prime 18.1 Language: Verilog HDL

    $125 (Avg Bid)
    $125 Avg Bida
    7 bida

    Subject:Practical FPGA Design and Interfacing Topic cover : State machine Structure: Programming using Quartus Prime

    $120 (Avg Bid)
    $120 Avg Bida
    7 bida
    $24 Avg Bida
    1 bida

    Verilog simple calculator using FPGA with 4x4 keypad and 7 segment display

    $110 (Avg Bid)
    $110 Avg Bida
    8 bida

    We need a engineer to help make fpga design for carrier board,if you have experience to do this job,then please contact me,thanks.

    $164 (Avg Bid)
    $164 Avg Bida
    5 bida

    Expert in FPGA-Xilinc ARTY A7-100 T and RISC-V for correcting a design model.

    $50 (Avg Bid)
    $50 Avg Bida
    2 bida

    Expert trainer in FPGA-Xilinc ARTY A7-100 T and RISC-V for 5 hours in supporting a design model. Per hour $2 to $5.

    $10 - $30
    $10 - $30
    0 bida

    To design convolutional neural network with various techniques (simple loops, with hardware loops, with loop unrolling and the combination of hardware loops and loop unrolling) using python, to convert the python code to verilog HDL and implement it using fpga.

    $230 (Avg Bid)
    $230 Avg Bida
    4 bida

    need to build a basic football game on FPGA and Xilinx. left side of the screen will be goal of one of the player and right side the other. Need to set 2 button. One of them for one player and one of them for other. In the middle there will be number 1 and it goes left and then to right. When it goes to left and player press the button, that number 1 will go right side. Therefore, players will be ...

    $87 (Avg Bid)
    $87 Avg Bida
    4 bida

    Simscape Simulation, GUI, Matlab Basically it is about linear actuator and I am using stepper motor (Complete: 10 June 2021 (Malaysian Time 12pm) (When Start Give Progress Everyday) (Make sure no copy paste codes or anything from any internet sources) Watch this youtube video basically it like this but I am using component in my proposal [log masuk untuk melihat URL] This project basically li...

    $194 (Avg Bid)
    $194 Avg Bida
    12 bida

    Simscape Simulation, GUI, Matlab Basically it is about linear actuator and I am using stepper motor (Complete: 10 June 2021 (Malaysian Time 12pm) (When Start Give Progress Everyday) (Make sure no copy paste codes or anything from any internet sources) Watch this youtube video basically it like this but I am using component in my proposal [log masuk untuk melihat URL] This project basically li...

    $128 (Avg Bid)
    $128 Avg Bida
    6 bida

    Hi Sergey P., I noticed your profile and would like to offer you my project. I would like a Google Colab example that calculates [log masuk untuk melihat URL] using the GPU. Preferrably a batch of secp256k1 hashes is reported back to the host. I've played a bit myself with running cuda in colab which works fine with the %%cu prefix. However most secp256k1 samples i've found are openCL...

    $24 (Avg Bid)
    $24 Avg Bida
    1 bida

    Simscape Simulation, GUI, Matlab Basically it is about linear actuator and I am using stepper motor (Complete: 10 June 2021 (Malaysian Time 12pm) (When Start Give Progress Everyday) (Make sure no copy paste codes or anything from any internet sources) Watch this youtube video basically it like this but I am using component in my proposal [log masuk untuk melihat URL] This project basically li...

    $235 (Avg Bid)
    $235 Avg Bida
    6 bida

    We are looking for a senior FPGA developer who has great experience with FPGA. If you can find LVDS/DSI IP Core license, it would be great for us. We will provide detailed documentation to shortlist candidates. Please feel free to contact us.

    $557 (Avg Bid)
    $557 Avg Bida
    7 bida

    Hi Suceveanu M., I noticed your profile and would like to offer you my project. I would like an Google Colab example that calculates [log masuk untuk melihat URL] using the GPU. Preferrably a batch of secp256k1 hashes is reported back to the host. I've played a bit myself with running cuda in colab which works fine with the %%cu prefix. However most secp256k1 samples i've found are op...

    $24 (Avg Bid)
    $24 Avg Bida
    1 bida

    I'm an experienced video editor who is looking for a developer to build a plugin for Adobe After effects and Premiere Pro. Using the After Effects and Premiere Pro SDK. Windows is priority 1. Apple also if possible. Cuda/OpenCL accelleration would be great. Idea: stroke plugin that shows border/stroke around an image or video. Options: - Stroke color (also with pipet) - Stroke thickness (pi...

    $317 (Avg Bid)
    $317 Avg Bida
    6 bida

    To create a host and a kernel using C++ and openCL.

    $22 (Avg Bid)
    $22 Avg Bida
    3 bida

    I need someone for a small project related with VHDL and counters experience with Xilinx will be apricated. is a very easy project so i think will not take much time also may be asked for an extra hour to explain the code (will be paid)

    $7 / hr (Avg Bid)
    $7 / hr Avg Bida
    8 bida
    FPGA developer Tamat left

    We are looking for a senior FPGA developer who has great experience with FPGA. If you can find LVDS/DSI IP Core license, it would be great for us. We will provide detailed documentation to shortlist candidates. Please feel free to contact us.

    $514 (Avg Bid)
    $514 Avg Bida
    9 bida

    I need someone who can Implement optimized bitsteam for both card types cvp13 as well as bcu1525 .As well as DNA locked pc [log masuk untuk melihat URL] file. It should be a Bitsteam and miner application for both cvp13 and bcu1525. Kawpow algorithm minimum hashrate of 400mh for bcu and 650 for cvp From my experience guys are taking a pc miner version that exists for graphic cards modifying it f...

    $170 (Avg Bid)
    $170 Avg Bida
    1 bida

    cần code verilog theo bài báo này [log masuk untuk melihat URL]

    $62 (Avg Bid)
    $62 Avg Bida
    4 bida

    Do you have experience with the Arduino Vidor FPGA board? Could you write code that uses the FPGA in this board to perform high speed parallel text processing of strings passed to the board via serial? Please let me know if you are interested. I have attached a screenshot, This is the ultimate goal, but I am hoping to first find out what is possible (and what is pragmatic). Another way of looking...

    $135 (Avg Bid)
    $135 Avg Bida
    8 bida

    We are an FPGA based data center. We are looking for FPGA developers to test our next cloud. We are also offer partnership opportunities.

    $27 / hr (Avg Bid)
    $27 / hr Avg Bida
    8 bida

    We are looking for FPGA developers to test our new FGPA accelerated cloud. Interested?

    $40 (Avg Bid)
    $40 Avg Bida
    1 bida

    I need someone who can build a prototype for an FPGA based streaming audio amplifier project. You must have a spectrum/distortion analyzer. Deliverable: Prototype hardware with firmware/software -Receive streaming Audio stack in ARM -Audio is output thru FPGA via 14 bit PWM -integrated small power amplifier

    $1606 (Avg Bid)
    $1606 Avg Bida
    16 bida

    An asynchronous SPI slave is required that shall connet to an SPI master at 20MHz SPI SCLK frequency. The SPI slave exists inside an FPGA. The SPI master exists inside a microcontroller. The FPGA system clock is going to be 40MHz-60MHz. The SPI SCLK and the FPGA system clock are asynchronous. The SPI slave is used to read/write fabric RAM registers that control the behaviour of the FPGA design or...

    $246 (Avg Bid)
    $246 Avg Bida
    14 bida

    I have a few Xilinx Alveo U250 FPGA boards that need to be benchmarked for performance before investing in more boards. Scenarios will include data processing with TensorFlow and cryptocurrency mining capabilities and benchmarks. The developer should be comfortable with Xilinx Vivado, Linux and C++. Any experience with TensorFlow and cyrptocurrency miners like ethminer and/or cpuminer are a bonus

    $4166 (Avg Bid)
    $4166 Avg Bida
    6 bida

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    $176 (Avg Bid)
    $176 Avg Bida
    4 bida

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    $221 (Avg Bid)
    $221 Avg Bida
    6 bida

    Need an expert in assembly and CPU on FPGA

    $76 (Avg Bid)
    $76 Avg Bida
    3 bida

    Image processing on FPGA using [log masuk untuk melihat URL] a image and do threshold operation like this

    $68 (Avg Bid)
    $68 Avg Bida
    3 bida

    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7. Design: I2C Master <-> FSM <-> UART

    $21 (Avg Bid)
    $21 Avg Bida
    2 bida

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    $206 (Avg Bid)
    $206 Avg Bida
    3 bida

    I need a working code in Verilog that is able to successfully simulate, synthesize and generate bitstream on Xilinx Vivado for FPGA. The code should be able to implement a Convolutional Neural Network and take as input weights and biases from a pretrained model in Python and then use them to identify the 28x28 pixel test image from a MNIST database. Whatever digit is identified by the code, releva...

    $305 (Avg Bid)
    $305 Avg Bida
    10 bida

    Hi! I want to deploy a custom RISC-V processor on FPGA. There are two tasks: 1. Deploy the core to run C codes on it and blink an LED (the core is implemented in Verilog and synthesizable). 2. Boot Linux Kernel (files are ready). I want to deploy the processors on the ZCU102 Zynq MPSoC Board (Zynq UltraScale) FPGA.

    $500 (Avg Bid)
    $500 Avg Bida
    6 bida

    The task is to improve the existing kernel module or develop its minimal implementation. The kernel module is designed to control PCIe device, Xilinx FPGA board (FPGA code is already developed). FPGA board have 4 digital GPIO's configured as inputs and generate an interrupt on the PCIe bus - MSI interrupt with number 0-3, each number corresponds to one exact GPIO pin. The kernel module must r...

    $248 (Avg Bid)
    $248 Avg Bida
    3 bida

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    $20 (Avg Bid)
    $20 Avg Bida
    1 bida

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    $10 - $30
    $10 - $30
    0 bida

    I am wanting to mine Bitcoin on my Xbox Series X console. i understand if the console is placed in Developer Mode has UWP support to run a program(OpenCL). Please only accept the job if you have access to a Xbox Series X and get this etup yourself and send the files and guide on howto mine Bitcoin.

    $235 (Avg Bid)
    $235 Avg Bida
    4 bida

    Hi, I've the report and coding with further instruction. The freelancer needs to make the video of software simulation Video of State Machine Implantation; FPGA vs Microcontrollers in keil software ( [log masuk untuk melihat URL]) Let me knock expert freelancer to get the job.

    $181 (Avg Bid)
    $181 Avg Bida
    3 bida

    I am looking for someone who can design FPGA mining bitstreams . I'm looking for someone who can work with me long term . This is a very serious project. Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest prio...

    $1281 (Avg Bid)
    $1281 Avg Bida
    4 bida

    Looking for an experienced fpga engineer to help me get going with Verilog and just basic fpga planning, resource allocation , memory controllers, ip use. Multiple sessions [Removed by Freelancer.com Admin for offsiting - please see Section 13 of our Terms and Conditions] maybe 3 times a week 1 hour per session

    $19 / hr (Avg Bid)
    $19 / hr Avg Bida
    6 bida

    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7.

    $50 (Avg Bid)
    $50 Avg Bida
    6 bida

    Hi Viktor S., I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    $35 (Avg Bid)
    $35 Avg Bida
    1 bida