I would like to hire a Verilog / VHDL Designer

$50-200 USD

Closed

Posted about 7 years ago

$50-200 USD

Paid on delivery

I have 2 schemes. One with neuron and with genetic algorithm. I need to combine both to train this neuron via genetic algo. Using VHDL in ISE design suite 14.7. Here is [login to view URL] picture of two symbols that I want to combine(gen - genetic algorithm with build in neuron process, neur4sigm - neuron with sigmoid func). I need to train this neuron with this alforithm. You can modify inputs to 3 or 4 it's up to you. I want that this genetic algorithm train my neuron and return expected results(nout port inside gen). Also, For the future purposes I want that we can add not only one neuron but whole neural nets(ex: 3-4-1).

Computer Science

FPGA

Verilog / VHDL

Project ID: 19467604

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Remote project

Active 7 yrs ago

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3 freelancers are bidding on average $166 USD for this job

@hayat38402

I am Excellent at the following:  Embedded C Programming.  VHDL/Verilog  Microcontroller like Arduino,RaspberryPi,FPGA, AVR, PIC and STM32.  IDEs like Keil MDK V5, ATmel studio and MPLab XC8.  IOT Technologies like Ethernet, GSM GPRS.  HTTP Restful APIs connection for IOT Communications. I can deliver your project efficiently at a time. If you choose me, I think you won't regret. Best Regards.

$200 USD in 5 days

4.7

(16 reviews)

5.0

@prakashddit

I got expertise of Verilog and VHDL since 4+ year of experience and also having knowledge of implementation of NN on FPGA. If you can share more details I do this project.

$111 USD in 5 days

4.8

(7 reviews)

3.7

@ghadakdr

it seems that you already write the VHDL code for both. so I don't think that the problem is just to make top level for both. I think the problem is how they are communicating or connected? if this was the problem then you should have written papers that illustrates both schemes. if so, please send them. if the problem is just connection so it is a trivial problem it take no time, I think.

$188 USD in 3 days