I need help regading an academic vhdl project. more infos after contacting me
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Hello! I have experience with describing electro-mechanical systems using mixed signal simulators that can run code written in VHDL-AMS. Looking forward to hear about you. Botond
I am Master And Asst prof in Electronics Departmentreputed University from India,I have 15 year exp in this filed. i handled Lot of student projects and guided them.i am strong in digital system VHDL verilog.