Technology research is already done. Internal FPGA system architecture is already designed. Therefore we only need you to implement and document it.
Project is already split and documented as 10 milestones so that development can be done incrementally, step by step, and reviewed/monitored.
Project is mostly Verilog development. Some simple programming necessary as well. Documentation is required.
We expect you to reserve 10-20 hours per week for this project. It should be around 80 hours in total.
We are interested in a quality implementation. If we are happy with it more projects will come in afterwards.
We require you show some previous Verilog & documentation projects.
Full project details, milestones and requirements will be shared once the candidate has been selected.
20 pekerja bebas membida secara purata $16/jam untuk pekerjaan ini
Dear sir I have more than 10 years experience in digital design using vhdl and verilog and Xilinx tools, please message me so that we can discuss Best regards