Sedang Disiapkan

Verilog Coding Very simple CPU (computer architecture) desig

This is a very very small project. Won't take much time because all design code is already written.

I already have a code. you need to fix some errors in verilog and write 2-3 testbenches and make already written code working (verification should not fail).

More than verilog design, main work is test bench. You should be expert.

Not for someone who want to learn. project should be completed in a day. Not apply if you are not free next 2 days.

Please send me message with your experience with verilog, previous verilog projects and education.

I will send you exact details about project in message.

You should know about computer architecture, pipelining.


Actually very simple project. 90% work is done. Budget no more than $50. will give bonus if everything completed on time.

Kemahiran: Kejuruteraan Elektrik, Elektronik, Verilog / VHDL

Lihat lagi: verilog cpu, simple cpu verilog, projects verilog, simple cpu verilog code, cpu verilog code, cpu verilog, verilog simple cpu, verilog code simple cpu, simple computer verilog, verilog code cpu, verilog code cpu design, simple verilog cpu, verilog code simple computer, verilog computer architecture, computer architecture verilog projects, computer architecture projects verilog, simple computer architecture, project cpu verilog, simple cpu design verilog code, architecture verilog project, project verilog code, computer architecture verilog, verilog cpu project, code cpu verilog, cpu design simple verilog code

Tentang Majikan:
( 3 ulasan ) surat, United States

ID Projek: #1578109

3 pekerja bebas membida secara purata $43 untuk pekerjaan ini


hi, i can help. i am very good in verilog and testbench waveforms.i have recently developed the SINGLE CYCLE MIPS micrprocessor in verilog along with the testbench waveforms. send the project description if you are Lagi

$50 USD dalam 2 hari
(37 Ulasan)

hi i can do it please see PMB

$50 USD dalam 2 hari
(3 Ulasan)

Hi, Funny I'm seeing your post; Four months ago I designed and tested an ATMEGA88 on a spartan 3. I wrote it in VHDL, but I am a stronger verilog designer than I am a VHDL designer. I'm currently a masters stude Lagi

$30 USD dalam sehari
(0 Ulasan)