I have a VHDL source for the Altera EP3C25F256C8 FPGA design. I like an expert to setup the timing and fitting parameters to give the design optimum performance. I use Quartus II software version 8.1
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Hi there, I have experienced in VHDL design and Timing closure analysis. I also familiar with Xilinx and Intel tools design. please take a look via my profile. thanks.