first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday.
I have attached the schematic for the PCB of the board you have. U3 is a DAC, X1 is a Xtal oscillator the frequency of which is contrlled by the DAC or potentiometer. U2 is a buffer to drive the FPGA. U4 is a buffer to provide a 10 MHz reference output.
P1 goes to the FPGA via a ribbon cable. P3 goes to the GPS puck.
You must always use the 3.3V regulator to drive the curcuit since it will blow up if it is supplied by a higher voltage. The regulator is in veroboard.
The GPS is used to firstly lock the Xtal to the GPS standard. The GPS is also used to provide the time.
That only requires the GPS puck to be connedted to the FPGA, Use the same pins as P1. I have also attached some information and VHDL code for GPS decoding as part of a second year assignment that I set at James Cook University
The second part of the project task is to populate the ADC and final amplifier stages on the PMU PCB, together with power supplied, so that the Analogue to digital conversion can be tested with the code being developed by the group."
And the attached file is the materials