PAL/NTSC video is samples at 27 MHz @ 10 bits and stored in a circular buffer, buffer does have a length of two video lines (128us). The video is simply processed and send out to a DAC back into normal PAL/NTSC. FPGA used is XC3S50AN. Your required to write the VHDL Code for the FPGA used. Video Codec used is ADV7202 from Analog devices. Control processor from Microchip is communicating with the FPGA for sending commands (type of processing needed). More details will be given to the winner of the Bid.
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Dear sirs, basically am an electronics engineer with hands on experience in embedded systems and VLSI.i can write very effective codings both in verilog and [url removed, login to view] currently working on Spartan 3/[url removed, login to view] additi Lagi