Switched capacitor network

@abdurRafiqM

HI, I am an experienced electronics and PCB Design engineer, specialised in use of ECAD software such as Altium Designer, KICAD, EasyEDA, etc. for the the design of electronics and PCB. I will design your projects to meet your Requirements and the industry standard. I do all kinds of circuits such as Power delivery circuit, Sensor Integrated Circuits, wireless control, MCUs etc. I will deliver the following. The Schematics for your Design The PCB for the design Bill of materials(If needed) Gerber, Pick and Place and other manufacturing and assembly drawings needed. Full Support and consultancy till the project is done. Kindly send me message for my previous designs and also so we can discuss further on your project I look Forward to working with you. Best Regards, Abdur-Rafiq

@karimabdellah

Hi there, I have carefully reviewed your problem statement regarding the MEMS readout design and the optimization of the SC network and dynamic amplifiers. ​To achieve your objectives efficiently, I will deliver this project using MATLAB for the mathematical behavioral modeling and performance comparison, along with LTspice for the transistor/circuit-level simulation to verify the sub-femtofarad capacitance detection, noise minimization, and the standalone 2-stage dynamic FIA performance. ​I will provide you with clear simulation schematics, comparative plots (Ideal vs. Practical vs. Dynamic), and a comprehensive final report. Looking forward to discussing the details with you!"

@princec619

I am an Electrical/Electronics Engineer with experience in analog circuit design, switched-capacitor systems, and amplifier analysis. I can optimize the SC network for sub-femtofarad capacitance sensing, compare ideal, practical, and dynamically biased amplifier architectures, and evaluate a standalone 2-stage dynamic FIA for gain, isolation, and power efficiency. I will provide detailed simulations, performance analysis, and technical documentation to support your research objectives.

@mwamuye

Electrical and Electronics Engineer I am an Electrical and mechatronics Engineer with expertise in analog circuit design, switched-capacitor systems, and amplifier analysis. I specialize in optimizing switched-capacitor networks for ultra-sensitive capacitance sensing applications and evaluating amplifier architectures for performance, efficiency, and reliability. My skills include the analysis and comparison of ideal, practical, and dynamically biased amplifier designs, as well as the evaluation of multi-stage dynamic amplifiers for gain, isolation, and power efficiency. I provide detailed circuit simulations, performance assessments, technical reports, and comprehensive documentation to support research, development, and engineering projects. I am committed to delivering accurate, high-quality solutions tailored to project requirements and objectives. Reply within an hour

@sniegul

Hi there, I’ve read through your MEMS readout challenge, and I understand the core issue: reliably resolving sub-femtofarad capacitance shifts in a switched capacitor network. That’s exactly the kind of problem I’ve tackled before. In my last project, I designed a low-noise charge amplifier and a correlated double-sampling front-end for a capacitive accelerometer, where we had to distinguish changes below 100 aF in a noisy environment. I’m comfortable working with switched capacitor topologies, parasitic-insensitive architectures, and the layout trade-offs needed to keep stray capacitance from drowning out your signal. If you’re open to it, I’d like to review your current network topology and noise budget. I can then propose a specific front-end design—likely a differential CDC with chopper stabilization—that fits your MEMS device’s parasitic load and target resolution. Let me know if you have a schematic or simulation data you can share; I’ll take a look and give you a concrete plan within a few days. Best regards, Alex

@Senavirathna1014

I can support the design, simulation, and evaluation of your MEMS capacitive readout system, with particular focus on sub-femtofarad sensitivity, switched-capacitor optimization, and dynamic amplifier performance. I will first develop and optimize the SC capacitance-to-voltage front end to maximize charge-transfer accuracy while reducing parasitic capacitance, kT/C noise, clock feedthrough, charge injection, and electrical interference. The amplifier study will include a structured comparison of: • Ideal amplifier models • Practical single-ended op-amp implementations • Dynamic-bias amplifier architectures Each approach will be evaluated for gain, bandwidth, settling time, noise, offset, power consumption, linearity, and sensitivity to process, voltage, temperature, and parasitic effects. I can also implement a standalone two-stage Floating Inverter Amplifier and verify its open-loop gain, common-mode behavior, inter-stage isolation, transient response, stability, and energy consumption. The results will be supported by schematics, simulation plots, comparison tables, and clear technical analysis. My proposed workflow includes architecture review, transistor-level design, testbench development, corner and Monte Carlo simulations, performance comparison, and final documentation suitable for a thesis or research report.