I want it in [url removed, login to view] DE1 board includes an SRAM chip, called IS61LV25616AL-10, a static RAM with a capacity of 256K 16-bit words.Â The SRAM interface consists of an 18-bit address port, A17−0, and a 16-bit bidirectional data port, I/O15−0.Â It also has several control inputs, CE, OE, WE, UB and LB, described as follows:
The data sheet describes a number of modes of operation of the memory and lists its many timing parameters.
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Hi, I am a 10 year experienced ASIC/FPGA digital designer. I have a lot of experience with Altera FPGAs. I am a VHDL expert and can do your task very quickly with high quality.