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Design a block diagram for a smart watch using vivado.

6 pekerja bebas membida secara purata $72 untuk pekerjaan ini

(476 Ulasan)
8.0
BOSIREX

Am a Mechatronic engineer with 5 year experience in my field and I believe i can handle your task to perfection.

$45 USD dalam 7 hari
(51 Ulasan)
5.5
moaazkh96

Hi, I am a senior digital design engineer, I have a broad knowledge of digital design in ASIC and FPGA using both VHDL and Verilog. I am using Vivado, ISE, and Quartise for FPGA, using DC, ICC, and prime-time for ASIC. Lagi

$89 USD dalam 10 hari
(30 Ulasan)
4.7
yakub6542

Hello, I hove gone through the job posting then understood the requirements and very much interested to work with you . I have five plus years of experience in verilog/vhdl. I have successfully finished multiple pr Lagi

$45 USD dalam 3 hari
(2 Ulasan)
2.7
snawoya

I am the best candidate for this Job because I am a computer Engineer with a Masters degree in Internet of things. I have done practice in Verilog/VHDL and well versed with microcontrollers. I also do PCB design hence Lagi

$100 USD dalam 6 hari
(0 Ulasan)
0.0
VLSIAkhi

Hi Client, I have experience in VLSI design and verification in many tools like xilinx, vivado, so i am sure i will help you, if you want more details you can freely contact to me. Thank you

$50 USD dalam 7 hari
(0 Ulasan)
0.0