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FPGA vhdl k-mean clustering algorithm code on zynq board

$30-250 USD

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Disiarkan 3 bulan yang lalu

$30-250 USD

Dibayar semasa penghantaran
Description: Create a Hardware-Software Codesign version of the k-mean clustering algorithm K-means clustering is a popular data mining algorithm that partitions n samples into k clusters (note: the k-nearest neighbor classifier algorithm used in machine learning can leverage the cluster centers produced by the k-means clustering algorithm). The problem is in general NP-hard but heuristic algorithms have been developed that quickly converge to a local optimum solution. We will consider one of those algorithms in this project. I have provided a C code version of the k-means clustering algorithm, and a Vivado block diagram and memory layout (explained below) that you will use as a starting point. You will need to study the C version and then decide which components to implement as a VHDL module using the BRAM (you also used BRAM in HISTO lab0).
ID Projek: 37481736

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Tentang klien

Bendera PAKISTAN
Daska, Pakistan
5.0
10
Ahli sejak Dis 17, 2016

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