Ditutup

MODELSIM AND SYNPLIFY TOOLS

3 pekerja bebas membida secara purata ₹1167 untuk pekerjaan ini

kundanvaghela

i can do it in modelsim.... i have 2.5+ year experience in design and verification, i have done 30+ project in verilog/VHDL, i will done your project perfectly and on time, i will provide support after completion of Lagi

₹1250 INR dalam sehari
(10 Ulasan)
3.4
vinendra77

Hi, I am Mtech graduate from IIT Roorkee and working on Hardware Description Languages Verilog and VHDL for the past 3 years. I have done many Digital system design projects using RTL design and FSM and had a working e Lagi

₹1200 INR dalam 2 hari
(10 Ulasan)
3.0
arslanmajid

Hi There. I can do you tasks within a specified time line. Specify your tasks and requirements and we can discuss further on this.

₹1050 INR dalam 7 hari
(0 Ulasan)
0.0