Suggest A Project


I have two project requirements. NO COPIES. I need some original work. I need the codes that are atleast about 300-350 lines in VERILOG (strictly, no VHDL please).

Your ideas and suggestions are encouraged. Will decide the cost of the project depending on the idea it's based on.


Project 1: 5th - 6th May

Project 2: 12th - 13th May

Kemahiran: Verilog / VHDL

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Tentang Majikan:
( 2 ulasan ) Mumbai, United States

ID Projek: #1598404

Dianugerahkan kepada:


I am Electronics Engineer And i can do a project for you. Regards

$70 USD dalam sehari
(2 Ulasan)

4 pekerja bebas membida secara purata $155 untuk pekerjaan ini


as in my PM

$150 USD dalam 4 hari
(0 Ulasan)

Hi, I am Avinash Venigalla from India. I hold an Bachelors degree in Electronics and Communication Engineering and also Masters in VLSI Design. I have enclosed a copy of my resume listing my academic training Lagi

$220 USD dalam 6 hari
(0 Ulasan)

Have 9years of Experience in VLSI Design & verification and testing of FPGA & ASIC designs, ASIC to FPGA prototyping, ASIC FEInt synthesis, LEC, linting and virage memory compilers, FPGA (XILINX) Board level designs, s Lagi

$180 USD dalam 5 hari
(0 Ulasan)