I am a senior digital design engineer,
I have a broad knowledge of digital design in ASIC and FPGA using both VHDL and Verilog.
I am using Vivado, ISE, and Quartise for FPGA, using DC, ICC, and prime-time for ASIC.Lagi
I am Mtech graduate from IIT Roorkee and working on Hardware Description Languages Verilog and VHDL for the past 3 years. I have done many Digital system design projects using RTL design and FSM and had a working Lagi
Dear client ,Greetings to you!!.
It is excited that your are looking to Create a VHDL Expert
. I understand that finding the right fit for your assignment is a top priority.
Getting the right communication engineer is Lagi