Imej profil Miklesam
@Miklesam
Ahli semenjak 13 Ogos 2018
0 Cadangan

Miklesam

Dalam Talian Luar Talian
FPGA Altera : MAX , ARRIA, Stratix, writing code on VHDL, signal simulation by Active-HDL. Writing and debugging programs for NIOS II. Development of multichannel data acquisition systems. Remote update system by ethernet by protocols TCP, UDP. Selection of network traffic by specified parameters . I'm looking for projects to develop my communication skills.
$15 USD/hr
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