Imej profil alexmhiolaru96
@alexmhiolaru96
Ahli semenjak 18 Januari 2020
0 Cadangan

alexmhiolaru96

Dalam Talian Luar Talian
I am a younger Engineer who is looking to grow and to involve in different types of projects. I am very passionate about Computer Architecture, Digital Design and AI. I have a strong background in verification methodology, multiprocessing programming and digital design. I would like to work with SystemVerilog and UVM but also I have experience with embedded application.
$10 USD/hr
1 ulasan
0.6
  • 100%Kerja Diselesai
  • 100%Mengikut Bajet
  • 100%Tepat Pada Masa
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Portfolio Items

Ulasan Terkini

Pengalaman

Design Verification Engineer - Contractor

Apr 2019 - Jan 2020 (9 months)

Part of verification team for a DDR5 Controller  Worked with AMBA CHI protocol and cache memory model  Collaborate with design teams for scalability and reusability improvements in the golden model (Scoreboard)  Built code generator for various SystemVerilog classes to eliminate repetitive processes and increase productivity

Junior Verification Engineer

May 2018

System Verilog and UVM Training: Become familiar with the programming language, creating a complete testbench for a DUT, writing test plan and functional, coverage. Proficiency acquired: SV, UVM usage, SVA, UVC architecture, Cadence Tools.  Specman Basic and ERM Training: Understand the features and capabilities of ERM for Specman. Creating an environment, test classes, sequences, and agents.  Protocols: SPI, UART, I2C

Software Developer Intern

Jul 2017 - Apr 2018 (9 months)

Running and growing an application for DCU(Dor Control Unit)configuration using Python, PyQt, Visual Basic.  Implemented different solution for a C library that it was part of Window Lifter: Units test, CAN analyze, S- function models  Travelling to clients company for DCU tests on cars

Pendidikan

Computer Engineering

2015 - 2019 (4 years)

Master in Embedded Systems

2019 - 2020 (1 year)

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