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Avatar Pengguna
$18 USD / jam
Bendera NEPAL
kathmandu, nepal
$18 USD / jam
Sekarang jam 10:11 PTG di sini
Menyertai Oktober 6, 2013
3 Cadangan

Krishna G.

@gaihrekrishna

4.8 (1 ulasan)
1.4
1.4
50%
50%
$18 USD / jam
Bendera NEPAL
kathmandu, nepal
$18 USD / jam
100%
Pekerjaan Disiapkan
100%
Mengikut Bajet
100%
Tepat Pada Masa
N/A
Kadar Upah Semula

FPGA Design + ML Acceleration Engineer

I have expertise on Machine Learning acceleration with FPGA [Cloud+Edge]. I am working on FPGA design since 5 years with expertise on FPGA Design with VHDL, Verilog, Python, OpenCL & Tcl. I have Tools experience of Xilinx VIVADO, ISE, VIVADO HLS, VIVADO SDK, SDSoC and Device experience of Xilinx Spartan, Zynq, Kintex and Vertex 7 Series and Ultrascale FPGA.I have skills on PYNQ development, Signal processing & Machine learning/Neural Net [login to view URL] can also contact me . Featured FPGA Projects: +Video/Image Processing with VHDL/Verilog and High Level Synthesis +Crypto Algorithm Implementation on FPGA +Tcl Scripting for FPGA Design +PCIe based FPGA Implementation +AES IP Design and Implementation on FPGA [128,256 bit] +FMC HDMI CAM module interfacing with ZedBoard FPGA -FPGA Hardware (i have): ZedBoard,Zybo, Pynq, Nexys 4, Nexys 2, Spartan 3E, FMC-HDMI-CAM Module form Avnet.

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Portfolio

4691433
4691447
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4595599
4595595
4691433
4691447
4594123
4595607
4595599
4595595

Ulasan

Perubahan disimpan
Menunjukkan 1 - 1 daripada 1 ulasan
Tapis ulasan mengikut:
4.8
$50.00 USD
Great work
V
Bendera Rt F.
@vhdlHelp
•
5 tahun yang lalu

Pengalaman

FPGA Research Lead

LogicTronix
Jun 2017 - Hari ini
Working on FPGA Development with VHDL, Verilog, HLS, MATLAB with Tools Xilinx VIVADO, HLS, SDK, SDSoC, SDAccel. I have expertise on Embedded System Design with Xilinx Zynq FPGA, Video Processing with Zynq, Machine Learning with FPGA, PYNQ Development, IP Development, Complete System Deployment on AWS, Nimbix and Plunify FPGA based Clouds.

FPGA Design Engineer

Digitronix Nepal
Jan 2013 - Mei 2017 (4 tahun, 4 bulan)
FPGA Design with VHDL/Verilog/Tcl and Xilinx Tools/Hardware

Pendidikan

M.Sc Engineering

Tribhuvan Vishwavidalaya, Nepal 2013 - 2015
(2 tahun)

Kelayakan

FPGA Trainer

Digitronix Nepal
2016
FPGA Training with Spartan and Zynq FPGA for Industrial and Academic Professionals.

Penerbitan

Face Detection and Recognition with PYNQ FPGA

FPGA World
The Face detection and recognition algorithm is implemented on the PYNQ FPGA. The VIVADO based overlay and Python methodology for face detection and recognition is followed on the PYNQ FPGA Board.

ARM Based Computing Technology for SD

IOE Graduate Conference
IOE Graduate Conference 2015

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