Hi,
I am a senior digital design engineer,
I have a broad knowledge of digital design in ASIC and FPGA using both VHDL and Verilog.
I am using Vivado, ISE, and Quartise for FPGA, using DC, ICC, and prime-time for ASIC.
I will provide you a professional report about your project with citation and scientific formatting.
Please contact me to know more about your needs.
Regards,
moaaz.