To explore different technologies by acquiring knowledge and experience with committed people in an esteemed company's RTL design and verification domain.
Skilled in Logic Design, RTL Design and Verification, FPGA Design integration, FPGA MPSoC, CDC, FPGA Prototyping, Board Testing, and debugging.
Hardware description languages: Verilog, VHDL.
Design Tools used : Xilinx Vivado, Modelsim/Questasim.
Protocols: Ethernet 1G, UART, SPI, I2C, AXI.
Hands-on experience: Zynq ultrascale+ MPSOC (ZCU106), Kintex 7 FPGA (KC705), ZedBoard, Zybo Board.