Verilog coding

₹600-1500 INR

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sekitar 6 tahun yang lalu

₹600-1500 INR

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Verilog code of Simplified DES algorithm

Computer Security

Software Architecture

Verilog / VHDL

ID Projek: 16776079

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Aktif 6 tahun yang lalu

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9 pekerja bebas membida secara purata ₹1,617 INR untuk pekerjaan ini

@kulwantsingh16

A proposal has not yet been provided

₹1,500 INR dalam 3 hari

4.6

(14 ulasan)

4.2

@hungfreelancer

I have 10 years of experience in design and verification using Verilog. Please message me. Best regards.

₹950 INR dalam 1 hari

5.0

(3 ulasan)

2.0

@HiLifeInfotech

Hi, Please PM for further discussion. Thanks

₹1,000 INR dalam 10 hari

5.0

(2 ulasan)

1.6

@shrikulj

Hi there I have a professional experience of about 6 years and about 4 years of academic experience working with FPGAs and Verilog/VHDL. Simplified DES is quite easy to code for me. I can quickly code the module and deliver with no errors. Please let me know if you are interested.

₹1,000 INR dalam 1 hari

0.0

(0 ulasan)

0.0

@chipdori

A proposal has not yet been provided

₹1,150 INR dalam 2 hari

0.0

(0 ulasan)

0.0

@umangangrish

A proposal has not yet been provided

₹800 INR dalam 1 hari

0.0

(0 ulasan)

0.0

@mounika7ms

I am pursuing my maters in Integrated Circuit Technology, and i have been working on VERILOG since last year. I have done a one year project on Digital Design of RADAR using VERILOG.

₹1,300 INR dalam 1 hari