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    1,186 hyperlynx xilinx ddr2 tugasan ditemui, harga dalam USD
    Linux Embedded specialist of Petalinux 2019.2, ARM and Xilinx architectures Tamat left

    ... What I've already achieved: I’ve generated the which contains: fsbl, uboot, bl31, pmufw, , u-boot and image.ub. When I program the flash with this the start running, but than an Error occurred: [ 4.421147] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(179,2) [ 4.429576] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-xilinx-v2019.2 #1 [ 4.436786] Hardware name: xlnx,zynqmp (DT) [ 4.440952] Call trace: [ 4.443391] dump_backtrace+0x0/0x148 [ 4.447039] show_stack+0x14/0x20 [ 4.450339] dump_stack+0x90/0xb4 [ 4.453644] panic+0x120/0x268 [ 4.456683] mount_block_root+0x1b0/0x260 [ 4.460674] mount_root+0x11c/0x148 [ 4.464146] prepare_namespace+0x158/0x1a0 [ 4.468226] kernel_init_freeable+0x1b8/0x...

    ARM Perisian Terbenam Linux Yocto
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    Looking for Professional Electrical Engineers Tamat left

    I am looking for electrical engineers having good expertise in following FPGA Xilinx Verilog/VHDL Raspberry Pi ESP32/Arduino

    Arduino Elektronik FPGA Raspberry Pi Verilog / VHDL
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    Linux Kernel Drm Driver Tamat left

    We need a petalinux drm-kms driver for our LVDS TFT Screen. We are using Xilinx zqyqmp-7EV chip, and LVDS pins are on the PL side. The driver should work well with Petalinux 2019.2 Screen detalis are on the attachment.

    Pengaturcaraan C Elektronik FPGA Linux Mikropengawal
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    FPGA acceleration for optimized DNN -- 2 Tamat left

    I am interested to work on a long term research project where I need to conduct a depth study to find a new robust method (Approach) in the area of FPGA acceleration with Deep Learning optimization with the skills of HW/SW Co-design for either memory optimization, algorithm optimization, Modification of architecture, deep compression using pruning and quantization, etc. My prefer FPGA is Xilinx Ultrascale which is going to be programmed using HLS, and I am open for any Neural Network that is good to be researched.

    AI (Artificial Intelligence) HW/SW Computer Vision Deep Learning FPGA Pytorch
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    QPSK/QAM TRANSCEIVER USING ZEDBOARD Tamat left

    ...I/Q samples. To implement this architecture the following design has been adopted by us. We have selected "Zedboard” ZYNQ/FPGA for base band signal processing & AD9361 RF Agile transceiver as a RF front end. For Data Packetization, Data enocding, decoding we are using ZYNQ/ARM processor. From the available open sources we have designed HDL project in FPGA (VIVADO-2020.2) and Software project in Xilinx Vitis and Modulator IP cores generated from Simulink model based deisign. We need help in data packetization, data encoding & decoding, channel encoding & decoding, controlling, sending and receiving the data or audio samples from the base band Modulator IP cores generated from MATLAB/SIMULINK model based design....

    Pengaturcaraan C Kejuruteraan Elektrik Elektronik Mikropengawal Verilog / VHDL
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    Expert on Verilog Tamat left

    Expert on Verilog with proficiency in Xilinx Vivado software

    FPGA Mikropengawal Verilog / VHDL Very-large-scale integration (VLSI)
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    Projek atau peraduan peribadi #31282481 Tamat left

    Sila Dafter atau Log masuk untuk melihat butiran.

    Kejuruteraan Elektrik Elektronik FPGA FPGA Coding Verilog / VHDL
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    Xilinx FPGA Camera Pipeline -- 2 Tamat left

    Create a time-synchronized stereo pair of cameras with four virtual devices. Each camera should support 4K @ 60 FPS and 1080P @ 240 FPS using the Jetson ISP and nvBuffers / li...to MIPI enabled FPGA that mounts camera devices on the Xavier AGX platform using Jetson ISP and a GeoSEMI ISP. Develop Tegra driver to capture data using GeoSEMI ISP and the Jetson ISP and modify device tree to mount the camera into the userspace. Developer Xavier AGX daughterboard to have 2 LVDS inputs for dual GPixel GMAX2509 sensors with GeoSEMI ISP and 4 MIPI outputs with 4x CSI lanes. Use Xilinx FPGA co-mounted on daughterboard to capture, convert and send data to the Xavier AGX platform by converting LVDS input to DSI output. Use DSI output routed via PCB traces to integrate with the AGX Xavier camera ...

    Embedded Systems FPGA Linux Susun Atur PCB Verilog / VHDL
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    Xilinx FPGA Camera Pipeline Tamat left

    Create a time-synchronized stereo pair of cameras with four virtual devices. Each camera should support 4K @ 60 FPS and 1080P @ 240 FPS using the Jetson ISP and nvBuffers / li...to MIPI enabled FPGA that mounts camera devices on the Xavier AGX platform using Jetson ISP and a GeoSEMI ISP. Develop Tegra driver to capture data using GeoSEMI ISP and the Jetson ISP and modify device tree to mount the camera into the userspace. Developer Xavier AGX daughterboard to have 2 LVDS inputs for dual GPixel GMAX2509 sensors with GeoSEMI ISP and 4 MIPI outputs with 4x CSI lanes. Use Xilinx FPGA co-mounted on daughterboard to capture, convert and send data to the Xavier AGX platform by converting LVDS input to DSI output. Use DSI output routed via PCB traces to integrate with the AGX Xavier camera ...

    Embedded Systems FPGA Linux Susun Atur PCB Verilog / VHDL
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    Xilinx FPGA Computational Storage Project -- 3 Tamat left

    For this project, we are looking for an RTL developer to assist in developing a technology Proof of Concept for a simplified FPGA-based system to store data in non-volatile memory (NVMe SSDs). Key Technologies you should be comfortable with are VHDL/Verilog, Xilinx FPGAs, Ethernet, NMVe, and RDMA/RoCE, IEEE 754 FPU, ARM Cortex-M1, and Xilinx Linux (Rustlang, Python, and Apache Arrow are also desirable) More details will be shared in the inbox

    Elektronik FPGA Mikropengawal Python Verilog / VHDL
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    Xilinx FPGA Computational Storage Project -- 2 Tamat left

    For this project, we are looking for an RTL developer to assist in developing a technology Proof of Concept for a simplified FPGA-based system to store data in non-volatile memory (NVMe SSDs). Key Technologies you should be comfortable with are VHDL/Verilog, Xilinx FPGAs, Ethernet, NMVe, and RDMA/RoCE, IEEE 754 FPU, ARM Cortex-M1, and Xilinx Linux (Rustlang, Python, and Apache Arrow are also desirable) More details will be shared in the inbox

    Elektronik Linux Mikropengawal Python Verilog / VHDL
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    Xilinx FPGA Computational Storage Project Tamat left

    For this project, we are looking for an RTL developer to assist in developing a technology Proof of Concept for a simplified FPGA-based system to store data in non-volatile memory (NVMe SSDs). Key Technologies you should be comfortable with are VHDL/Verilog, Xilinx FPGAs, Ethernet, NMVe, and RDMA/RoCE, IEEE 754 FPU, ARM Cortex-M1, and Xilinx Linux (Rustlang, Python, and Apache Arrow are also desirable) More details will be shared in the inbox

    Elektronik Linux Mikropengawal Python Verilog / VHDL
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    Projek atau peraduan peribadi #31062124 Tamat left

    Sila Dafter atau Log masuk untuk melihat butiran.

    Kejuruteraan Elektrik FPGA PCB Design and Layout Susun Atur PCB Verilog / VHDL
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    Model based FPGA design in matlab Tamat left

    We are looking for a Matlab & simulink expert for modelling FPGA in Xilinx vivado. The project will be a part of training on simulink for 8 hours.

    DDR3 (PCIe, board design/fpga) FPGA Matlab and Mathematica Verilog / VHDL
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    VHDl Based design Tamat left

    ADS7038 Xilinx Virtex DAC7750 If 1Vpp is given to ADS7038 it should convert that input into digital signal and store it into the memory of Xilinx Virtex FPGA and DAC7750 should convert the digital stored data into analog 1Vpp. Write VHDL code for communication with ADS7038 and DAC7750 where FPGA Virtex is the master controller. Write the code on Xilinx Vivado and send simulation pictures. The code must be synthesisable. Also include a short description of how the communication works with these devices.

    Kejuruteraan Elektrik Elektronik FPGA Mikropengawal Verilog / VHDL
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    Optimization of QPSK using VHDL onto FPGA Tamat left

    Modulation and Demodulation of QPSK using VHDL using XILINX IDE.

    Elektronik FPGA Verilog / VHDL
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    Anybody who has good experience of Verilog and it would be better if he had been using Xilinx ISE and iSim/ModelSim. Tamat left

    Anybody who has good experience of Verilog and it would be better if he had been using Xilinx ISE and iSim/ModelSim

    Kejuruteraan Elektrik Kejuruteraan FPGA Mikropengawal Verilog / VHDL
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    Optimisation of QPSK using FPGA Tamat left

    Use Xilinx IDE to create the project. More details can be provided.

    Kejuruteraan FPGA Verilog / VHDL
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    Xilinx Zynq 7020 / GPS Software Defined Radio Receiver / Baremetal / Petalinux Tamat left

    Development to be performed on Vivado 2019.1 version using Xilinx Zynq 7020 in order to: - Acquire Galileo and GPS signals in real time (FFT and IFTT) - Track Galileo and GPS signals in real time (DLL and PLL) - Demodulation of the Galileo and GPS signals (bit synchronisation and demodulation) Timeline:30 days

    ARM Elektronik FPGA GPS Verilog / VHDL
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    Implementing an Image Processing project on Zynq Device on a custom FPGA using the tools by Xilinx(Vivado HLS, IDE and SDK) Tamat left

    The project I’m working on is called Dust Detection on Reed Switch Images. The project is implemented on the Zynq device on a custom FPGA development board. The first half of the algorithm is implemented on the PL side (using Vivado HLS and IDE) and the second half of the project is to be implemented on the PS side of the Zynq device (using Xilinx SDK). The steps that are to be implemented on the PL part of the project are complete and desired outputs are obtained. A gist of the PL part of the project: The HLS IP core is created on Vivado HLS and then exported to Vivado IDE. The input image is stored in an input VDMA (with only read channels enabled) which is connected to the input of the HLS IP, and the output of the HLS IP is given to an output VDMA (with only write cha...

    Pengaturcaraan C FPGA
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    FPGA for Deep Neural Network tutor Tamat left

    I would like to start this project by having a long tutoring sessions in SoC FPGA with DNN knowledge to implement the algorithm and optimize them. Basically, you should have been working with Xilinx board SoC FPGA, accelerator design, coding in HLS, Vitis. Being able to build ANN like CNN, LSTM, RNN, GANs, with Pytorch or Tensorflow and optimize them using deep compression, pruning, and quantization.

    Deep Learning FPGA Neural Networks Pytorch Verilog / VHDL
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    Application That Uses Xilinx PCI-Express Driver -- 2 Tamat left

    We need an application that uses the following: We need to be able to write and read data to a PCI-Express device using this example project. The application should provide a means to read an write up to 4096 bytes from a file and to a file.

    Pengaturcaraan C Pengaturcaraan C++ PCI Express
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    Xilinx Zynq 7020 - Video Pipeline and Image Grabber - Vivado 2019.1 / Petalinux 2019.1 Tamat left

    I'm looking for a SoC / Firmware engineer who has rich experience in Vivado 2019.1 / PetaLinux programming. The board is a Zedboard (Z7020) connecting to the Ominivision Camera (OG02B10) via a customised board. The project consists of -) Solving our current Vivado issue with a Digilent PCAM camera -) Developping a customised IP block for the Omnivision OG02B10 camera sensor -) Creating a Vivado design (2019.1) to collect image frames from the omnivision cameras and to save them into the SD cards (in jpeg format) -) Provide documentation on the code

    Computer Vision Elektronik Perisian Terbenam Linux Mikropengawal
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    Xilinx Zynq 7020 - VHDL/Processor Application - Vivado 2019.1 Tamat left

    I'm looking for a FPGA / Firmware engineer who has rich experience in FPGA and VHDL/verilog programming. The board is a Zedboard (Z7020) connecting to the RF front-end (MAX2771 EK). The project consists of -) Creating in baremetal application a Vivado pipeline (2019.1) to collect RF data from the MAX2771 to be transferred to the FPGA side of the Zynq SoC -) Optimise our code for GPS position real-time application (FFT / IFFT / Signal Correlation) -) Provide documentation on the code

    Elektronik FPGA Mikropengawal Verilog / VHDL
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    Desenvolver um Ebook + Infográfico sobre dicas para a compra de um computador (Idioma Português - Brasil) Tamat left

    ...sem ser enganado Desenvolver um Ebook de 10 a 15 páginas esclarecendo tudo que uma pessoa precisa saber para não ser enganado na hora de comprar um computador. Trata-se de um material informativo com o objetivo de ajudar nossos clientes com uma linguagem simples (mas ao mesmo tempo de alto valor) de como comprar um computador sem ser enganado. Algumas informações que pensamos: • Memórias ddr2 X ddr3 • Aplicação de cada tipo de computador (o que serve para o que?) • Processadores e suas gerações • SSD X HD • Windows original x avaliação x pirata • Cuidado com preço baixo • Pós vendas • Marcas e qualidade de equipamentos, com...

    eBuku Reka Bentuk Grafik
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    Embedded Linux Development Tamat left

    I need to build embedded linux images for different development boards ranging from STM32 to Xilinx. Each image needs to have different modules configured in them (e.g ssh, ftp,, wifi, ethernet, etc.) Each board might have to be configured to boot from NAND/SD-card/TFTP depending upon the requirements. The UBOOT may need to be configured for various different features. The device tree might need to be customized as well. There could be the possibility of using either Yocto or Buildroot for a given board. There might be bash scripting involved as well in terms of automating the build for a particular board.

    Pengaturcaraan C Elektronik Perisian Terbenam Linux Mikropengawal
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    Working with IDELAYE3 primitives of Xilinx UltraScale FPGA: delay calucaulations Tamat left

    Need to implement different logics using primitives like IDELAYE3 / ODELAYE3 primitives to calculate delays accurately with few PS resolution.

    Reka Bentuk Digital Elektronik FPGA Simulation Verilog / VHDL
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    To Read accelerometer from Xilinx FPGA Tamat left

    Hello, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7. Design: I2C Master <-> FSM <-> UART

    FPGA Verilog / VHDL
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    Xilinx FPGA Expert Tamat left

    Xilinx SOC expert is required for a line of projects focusing on AI as a service, where we will build a SOC based server accessible from the cloud. The ideal candidate needs to be experienced with VIVADO, VITIS, HLS, and OpenCL. The ideal candidate must be an AXI4 expert and has real life experience with HLS, we will not teach anybody what's HLS and how he is supposed to use it, so please only apply if you have HLS experience not if you think that you are a quick learner. You will be given an Ubuntu machine to RDP the work environment including VIVADO, VITIS, HLS, and the test boards EK-U1-ZCU104-G and 122-EK-U1-ZCU208 will be connected to the RDP machine.

    Pengaturcaraan C Kejuruteraan Elektrik Elektronik Mikropengawal Verilog / VHDL
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    Xilinx - system generator mat lab project Tamat left

    main project is something with xilinx and matlab for the selection and sorting out send me a following as trail and verification of a third order IIR High Pass Filter with a cutoff freq of 5 KHz Using Xilinx System Generator Ref:

    Kejuruteraan Reka Bentuk Perindustrian MATLAB Simulation
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    basic game in 7 segment display Tamat left

    need to build a basic football game on FPGA and Xilinx. left side of the screen will be goal of one of the player and right side the other. Need to set 2 button. One of them for one player and one of them for other. In the middle there will be number 1 and it goes left and then to right. When it goes to left and player press the button, that number 1 will go right side. Therefore, players will be goalkeeper. When they press the button, direction of the ''ball'' will change. There will be 3 game, and scoarboard will show the score to screen at the end.

    Kejuruteraan Elektrik Elektronik FPGA Mikropengawal Verilog / VHDL
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    VHDL related project (Using Xilinx for coding) Tamat left

    This project needs Xilinx for coding for hardware modeling and design and implementation of 4 bit ALU. It needs to be done in next 24 hours. Please inbox me further details.

    Kejuruteraan FPGA Mikropengawal Verilog / VHDL
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    Vivado Xilinx FPGA Programmer Tamat left

    I have a few Xilinx Alveo U250 FPGA boards that need to be benchmarked for performance before investing in more boards. Scenarios will include data processing with TensorFlow and cryptocurrency mining capabilities and benchmarks. The developer should be comfortable with Xilinx Vivado, Linux and C++. Any experience with TensorFlow and cyrptocurrency miners like ethminer and/or cpuminer are a bonus

    Pengaturcaraan C Kejuruteraan Elektrik FPGA FPGA Coding Mikropengawal Verilog / VHDL
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    Xilinx Bitcoin Control Board & Asic Hash Board -- 2 Tamat left

    I have a ASIC SHA256 BTC miner project that was started and is about 80% to 90% complete. The main control board was done with Xilinx chip and the hash boards use ASICs Current Work that needs to be DONE: 1. Check of all PCB to make sure correct? Was notified from manufacture that there is traces that go nowhere the Xilinx firmware to work with the ASIC chips. asic pin out is available. Firmware needs a bit of work but its 90% completed. 3. The hashboard PIC chip has not been programmed to communicate with the Xilinix chip on the Control Board 3. Overall Project check to make sure everything is working correctly? 4. Add more feature to the firmware 5. After this is completed, we will send out for PCB and chip placement. 6. Run testing and debugging to make su...

    ASIC Elektronik Firmware FPGA Mikropengawal PCB Design and Layout Verilog / VHDL
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    Read accelerometer from Xilinx FPGA -- 2 Tamat left

    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7. Design: I2C Master <-> FSM <-> UART

    Kejuruteraan Elektrik Elektronik FPGA Mikropengawal Verilog / VHDL
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    Project for Edward B. Tamat left

    hello there excuse my ignorance but what would be the possibility of running a trading bot via a Xilinx card, kind regards

    Pengaturcaraan C Pengaturcaraan C++ Bahasa Pengaturcaraan R Analisis Statistik Statistik
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    Write a code in Verilog for a CNN that is able to detect digits from MNIST databse Tamat left

    I need a working code in Verilog that is able to successfully simulate, synthesize and generate bitstream on Xilinx Vivado for FPGA. The code should be able to implement a Convolutional Neural Network and take as input weights and biases from a pretrained model in Python and then use them to identify the 28x28 pixel test image from a MNIST database. Whatever digit is identified by the code, relevant LED on the FPGA board should light up. For eg if the digit identified is a 2, then 2nd LED on the board should light up.

    Algoritma FPGA Machine Learning (ML) Python Verilog / VHDL
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    functional block Tamat left

    functional block in xilinx 14.7

    Reka Bentuk Litar Elektronik
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    Kernel module that supports MSI PCIe Tamat left

    ...implementation. The kernel module is designed to control PCIe device, Xilinx FPGA board (FPGA code is already developed). FPGA board have 4 digital GPIO's configured as inputs and generate an interrupt on the PCIe bus - MSI interrupt with number 0-3, each number corresponds to one exact GPIO pin. The kernel module must register the triggering of this interrupt and pass the number of this interrupt to the user space. There is a kernel module developed by Xilinx to support DMA exchange, but this module does not have interrupt support. I will stick to your solution - refine the current driver or make a minimal skeleton with only interrupts. OS: CentOS (I have built and tested the kernel module provided below) Driver: Board: https://github

    Pengaturcaraan C Linux
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    Project for Mykyta M. Tamat left

    Hi Mykyta M. I noticed your profile and would like to offer you a role. I'm doing some xilinx work and need help with assembly work and schematics. 3 questions in total.

    Reka Bentuk Litar Kejuruteraan Elektrik Elektronik PCB Design and Layout Susun Atur PCB
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    Project for Mairaj Ali Tamat left

    Hi Mairaj Ali, I noticed your profile and would like to offer you a role. I'm doing some xilinx work and need help with assembly work and schematics. 3 questions in total.

    Arduino Kejuruteraan Elektrik Kejuruteraan Matematik Matlab and Mathematica
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    Xilinx Bitcoin Control Board & Asic Hash Board Tamat left

    I have a ASIC SHA256 BTC miner project that was started and is about 80% to 90% complete. The main control board was done with Xilinx chip and the hash boards use ASICs Current Work that needs to be DONE: 1. Check of all PCB to make sure correct? Was notified from manufacture that there is traces that go nowhere 2. Complete Xilinx firmware to work with the ASIC chips. Data sheet is available for older model asic chip but not newest chip. So you need to find way to do it without the newest data sheet. I was told the oldest data sheet can help with this. 3. Overall Project check to make sure everything is working correctly? 4. Add more feature to the firmware 5. After this is completed, we will send out for PCB and chip placement. 6. Run testing and debugging to make sure ev...

    ASIC Elektronik FPGA Mikropengawal Verilog / VHDL
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    Read accelerometer from Xilinx FPGA Tamat left

    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7.

    FPGA Verilog / VHDL
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    Project on VHDL using Xilinx Vivado Tamat left

    Project on VHDL using Xilinx Vivado. Need some one expertise on Digital Design using Xilinx Vivado.

    Kejuruteraan Elektrik Elektronik FPGA Mikropengawal Verilog / VHDL
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    Buildroot2Yocto Tamat left

    I am looking for contractor to convert an project based on RISC-V currently running on Xilinx VC-707 utilizing Buildroot to YOCTO

    Embedded Systems FPGA Coding Linux Yocto
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    Lane Detection System for Autonomous Vehicles Tamat left

    The system will take in real time images and perform lane detection by running the software on an ARM processor implemented on a Xilinx Zync device. This system will enable future investigations into hardware acceleration of critical components such as the Canny detector in FPGA hardware. The system will be demonstrated on a Xilinx PYNQ [3] APSOC platform. This is the reason for the specification of Python as the programming language.

    Kejuruteraan Elektrik FPGA Mikropengawal Python Verilog / VHDL
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    Assistance with VHDL on Ubuntu Tamat left

    Hi, I need help with VHDL on Ubuntu Virtual Machine. I have a coursework that is due on Friday 30th April that I have been doing wrong and need assistance in completing it on time. It is about Mandelbrot and Julia sets. Knowledge on FPGA would be helpful. I have completed coding on Xilinx for windows and am struggling to incorporate it into Ubuntu and the templates provided. An expert in Ubuntu would be desirable. I have attached the coursework brief for your information. I have attached the coursework brief for your information.

    Ubuntu Verilog / VHDL
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    Openstack expert needed ASAP Tamat left

    We are seeking an experience openstack developer to assist in building, modifying, and operating our existing accelerated cloud platform. The job will entail creating and managing multiple openstack clusters, modifying openstack services to enable advanced features, and pl...least half-time Housing and relocation assistance can be provided
 Skills Required * Openstack Expert (Victoria) * Python Developer * Must be able to modify openstack services to extend functionality * General Linux sysadmin experience * Ubuntu * Experience with Cloud Computing environments
 Not required, but helpful: * Fontend/Horizon/UI Development * Puppet/Ansible Experience * Experience with Xilinx or Intel FPGAs * Kubernetes Experience * Data center automation/monitoring experience Jarvis / Openstack / V...

    FPGA Kubernetes OpenStack Python
    $52 / hr (Avg Bid)
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    I need a Verilog Xilinx desginer for my digital circuit design lab Tamat left

    have been struggling with this lab for a long time, very hard for me, need assistance, related file is provided

    Reka Bentuk Litar Kejuruteraan Elektrik Elektronik Mikropengawal Verilog / VHDL
    $116 (Avg Bid)
    Segera
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    vivado xilinx expert needed -- 3 Tamat left

    i want long term employee. need to prepare report also. if you are expert in verilog, vhdl. please bid here

    Kejuruteraan Elektrik Elektronik Kejuruteraan FPGA Verilog / VHDL
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